Suppose we have a state machine Q, that implements a common first in first out queue. The input alphabet of Q consists of “Deq” and “Enq x” where “x” ranges over a set of values, say, V. Let’s fix the
simple lemma about pipelines
The connection between group structure and pipeline design seems like it merits a lot more attention than it gets. It’s not too hard to show that in a pipeline like the one to the right, the induced monoid of M1
The Amory Lovins bottleneck
Lovins observes that power inputs in many industrial processes go into a bottleneck that makes power conservation hard if you start at the wrong end. The power goes into a long pipeline of process that emerges on the other end
An interesting article in ACM communications: is the world ending?
Coverity has a program that reads other programs looking for errors. The company started as a research project from Stanford (how unusual!) and the Communications article is really about what they found in commercial world. One thing they found was
Toyota’s problem: hardware weenies and poor accounting practices [updated]
Jamie Kitman’s look at the twisted path Toyota followed to it’s current difficulties inspired me to think about software and money – two topics I spend way too much time thinking about. As a purely disinterested observer (ahem) it has
Recursion and state update and Hungarian Mathematicians
Please see this ever modifying page which seeks to demonstrate in a poorly organized, yet humorous manner, what the hell I’m trying to accomplish with this primitive recursive state machine stuff. And as an added bonus – the great “Recursive
Instructions per joule – a good start
… multi-GHz superscalar quad-core processors can execute approximately 100 million instructions per Joule, assuming all cores are active and avoid stalls or mispredictions. Lower-frequency in-order CPUs, in contrast, can provide over 1 billion instructions per Joule—an order of magnitude more
sequential and combinational state machines
There’s a correspondence between the notions of “combinational” and “sequential” in digital circuit engineering and some structure in state machines (and therefore monoids) that seems interesting. In digital logic, a “combinational” circuit like a logic gate has can be associated
Linux semaphores
Re: Schedule idle MOLNAR Ingo (mingo@chiara.csoma.elte.hu) Wed, 11 Nov 1998 04:09:32 +0100 (CET) […] > _please_ We can do better than this. Only semaphores (not spinlocks) need > to have the priority inheritance. […] nope there are _not_ only semaphores,
Why Computer Science is a failed field #2
I mentioned the phobia against mere experimentation recently, but now I have some more fascinating glimpses into “peer review”. I have some theoretical work I’m trying to finish up and get published somewhere so someone smart can do something with