AT&T considers reading all the packets that cross its lines. Quite an interesting proposal. Tim Wu’s take The prospect of AT&T, already accused of spying on our telephone calls, now scanning every e-mail and download for outlawed content is way
what do we got to verify in an os?
From comments below. Just one more comment: I think we should make a distinction between a tool that can verify threaded code and a tool that can verify the code that implements threading. The latter is what you are looking
Happy new year and validation
Updated below! Years ago I proposed the following code snippet as a minimal standard for a useful verification method. Still not quite there. /* you are not expected to understand this */ if(save()){ load_memory_management(); /* map in new current */
Cell phone handsets and linux and software value
Update at the end. Two FSMLabs alumni are leading the charge for Linux handsets in two different companies. Jason Whitmire is now GM of cell phones for Wind River. Jason’s blog is here and a Linuxdevices article discusses his first
formal methods considered harmful and more on soft real-time
[fixed a couple of typos, Dec. 20 2007] John Regehr writes: On the other hand, there is plenty of useful work to be done on supporting time sensitive applications (I’ll just avoid saying “soft real-time”) even when no guarantees are
Soft real-time and QOS (revised)
[ revised version of an older post] “Soft real-time” is a perfect example of the “soft design” noted in an earlier post. There are perfectly good ways of characterizing quality of service (QOS) assurances precisely. Doug Jenson proposes one possible
Sparc T2 (niagra 2)
UT architecture seminar today was by Greg Grohoski from Sun – an updated version of his Hot Chips talk. I’m not a big fan of this approach to chip architecture: 8 processors, each with 8 threads, but they are working
OpenBSD developer notes king’s clothing is “virtual”
Theo de Raadt explains why virtualization does not improve security. How about this: to improve security, you have to have a secure design, a marketing buzzword won’t do the trick. Anyone who has seriously looked that the current generation x86
Distributed shared memory from first principles
[Update 10/16] What is the fundamental performance limiting factor that has dominated that last 30 years of computer architecture? The obvious answer is the disparity between processor and memory/storage speed. We connect processors to cache, to more cache, to even
more on missed wakeup
Here are some conventions [Update: typos fix, Friday] We are concerned with state machines and sequences of events. The prefixes of a sequence include the empty sequence “null” and the sequence itself. Relative state: If “w” is the sequence of